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IRLR3105 irlu3105 hexfet ? power mosfet s d g v dss = 55v r ds(on) = 0.037 ? i d = 25a www.irf.com 1 d-pak i-pak IRLR3105 irlu3105 parameter typ. max. units r jc junction-to-case ??? 2.65 r ja junction-to-ambient (pcb mount)* ??? 50 c/w r ja junction-to-ambient ??? 110 thermal resistance automotive mosfet parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 25 i d @ t c = 100c continuous drain current, v gs @ 10v 18 a i dm pulsed drain current 100 p d @t c = 25c power dissipation 57 w linear derating factor 0.38 w/c v gs gate-to-source voltage 16 v e as single pulse avalanche energy 61 mj e as (tested) single pulse avalanche energy tested value 94 i ar avalanche current see fig.12a, 12b, 15, 16 a e ar repetitive avalanche energy mj dv/dt peak diode r ecovery dv/dt 3.4 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) absolute maximum ratings specifically designed for automotive applications, this hexfet ? power mosfet utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. additional features of this design are a 175c junction operating temperature, fast switching speed and im- proved repetitive avalanche rating . these features combine to make this design an extremely efficient and reliable device for use in automotive applications and a wide variety of other applications. the d-pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. the straight lead version (irlu series) is for through-hole mounting applications. power dissipation levels up to 1.5 watts are possible in typical surface mount applications. description l logic-level gate drive l advanced process technology l ultra low on-resistance l 175c operating temperature l fast switching l repetitive avalanche allowed up to tjmax features pd - 94510b
2 www.irf.com s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source current integral reverse (body diode) ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.3 v t j = 25c, i s = 15a, v gs = 0v t rr reverse recovery time ??? 52 78 ns t j = 25c, i f = 15a, v dd = 28v q rr reverse recoverycharge ??? 82 120 nc di/dt = 100a/s t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics 25 100
when mounted on 1" square pcb (fr-4 or g-10 material) . for recommended footprint and soldering techniques refer to application note #an-994 notes through are on page 11 parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 55 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.056 ??? v/c reference to 25c, i d = 1ma ??? 30 37 v gs = 10v, i d = 15a ??? 35 43 v gs = 5.0v, i d = 13a v gs(th) gate threshold voltage 1.0 ??? 3.0 v v ds = v gs , i d = 250a g fs forward transconductance 15 ??? ??? s v ds = 25v, i d = 15a ??? ??? 20 a v ds = 55v, v gs = 0v ??? ??? 250 v ds = 44v, v gs = 0v, t j = 150c gate-to-source forward leakage ??? ??? 200 v gs = 16v gate-to-source reverse leakage ??? ??? -200 na v gs = -16v q g total gate charge ??? ??? 20 i d = 15a q gs gate-to-source charge ??? ??? 5.6 nc v ds = 44v q gd gate-to-drain ("miller") charge ??? ??? 9.0 v gs = 5.0v, see fig. 6 and 13 t d(on) turn-on delay time ??? 8.0 ??? v dd = 28v t r rise time ??? 57 ??? i d = 15a t d(off) turn-off delay time ??? 25 ??? r g = 24 ? t f fall time ??? 37 ??? v gs = 5.0v, see fig. 10 between lead, 6mm (0.25in.) from package and center of die contact c iss input capacitance ??? 710 ??? v gs = 0v c oss output capacitance ??? 150 ??? v ds = 25v c rss reverse transfer capacitance ??? 28 ??? pf ? = 1.0mhz, see fig. 5 c oss output capacitance ??? 890 ??? v gs = 0v, v ds = 1.0v, ? = 1.0mhz c oss output capacitance ??? 110 ??? v gs = 0v, v ds = 44v, ? = 1.0mhz c oss eff. effective output capacitance ??? 210 ??? v gs = 0v, v ds = 0v to 44v s d g electrical characteristics @ t j = 25c (unless otherwise specified) r ds(on) static drain-to-source on-resistance l s internal source inductance ??? 7.5 ??? l d internal drain inductance ??? 4.5 ??? i dss drain-to-source leakage current m ?
www.irf.com 3 fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0. 1 1 10 100 v ds , drain-to-source voltage (v) 0. 01 0. 1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.0v 20s pulse width tj = 25c vgs top 1 5v 10v 5.0v 3.0v 2.7v 2.5v 2.25v bottom 2.0v 0. 1 1 10 100 v ds , drain-to-source voltage (v) 0. 1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.0v 20s pulse width tj = 175c vgs top 1 5v 10v 5.0v 3.0v 2.7v 2.5v 2.25v bottom 2.0v 2. 0 4. 0 6. 0 8. 0 v gs , gate-to-source voltage (v) 0. 01 0. 10 1. 00 10. 00 100. 00 1000. 00 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = 25v 20s pulse width 0 10203040 i d, drain-to-source current (a) 0 5 10 15 20 25 30 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c v ds = 25v 20s pulse width fig 4. typical forward transconductance vs. drain current
4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 v sd , source-todrain voltage (v) 0.1 1.0 10.0 100.0 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 1 10 100 1000 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec 0 10203040 q g total gate charge (nc) 0 4 8 12 16 20 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 44v vds= 28v vds= 11v i d = 15a for test circuit see figure 13 1 10 100 v ds , drain-to-source voltage (v) 0 400 800 1200 1600 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd
www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 25 50 75 100 125 150 175 0 5 10 15 20 25 30 t , case temperature ( c) i , drain current (a) c d fig 10. normalized on-resistance vs. temperature -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 25a
6 www.irf.com 25 50 75 100 125 150 175 0 20 40 60 80 100 starting tj, junction temperature ( c) e , single pulse avalanche energy (mj) as i d top bottom 6.1a 11a 15a q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 14. threshold voltage vs. temperature r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 0. 0 0. 5 1. 0 1. 5 2. 0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a
www.irf.com 7 fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1. 0e-07 1. 0e-06 1. 0e-05 1. 0e-04 1.0e-03 1. 0e-02 1. 0e-01 tav (sec) 0. 1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses. note: in no case should tj be allowed to exceed tjmax 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 10 20 30 40 50 60 70 e a r , a v a l a n c h e e n e r g y ( m j ) t op single pulse bottom 50% duty cycle i d = 15a
8 www.irf.com fig 17.

for n-channel hexfet power mosfets
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? ?

p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - ? ? !"!! ? # $$ ? !"!! % " v ds 90% 10% v gs t d(on) t r t d(off) t f &' 1 ( # 0.1 % + - fig 18a. switching time test circuit fig 18b. switching time waveforms
www.irf.com 9 d-pak (to-252aa) package outline

d-pak (to-252aa) part marking information 6.73 (.265) 6.35 (.250) - a - 4 1 2 3 6.22 (.245) 5.97 (.235) - b - 3x 0.89 (.035) 0.64 (.025) 0.25 (.010) m a m b 4.57 (.180) 2.28 (.090) 2x 1.14 (.045) 0.76 (.030) 1.52 (.060) 1.15 (.045) 1.02 (.040) 1.64 (.025) 5.46 (.215) 5.21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) 6.45 (.245) 5.68 (.224) 0.51 (.020) min. 0.58 (.023) 0.46 (.018) lead assignments 1 - gate 2 - drain 3 - source 4 - drain 10.42 (.410) 9.40 (.370) notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 2 controlling dimension : inch. 3 conforms to jedec outline to-252aa. 4 dimensions shown are before solder dip, solder dip max. +0.16 (.006).
10 www.irf.com i-pak (to-251aa) package outline

i-pak (to-251aa) part marking information 6.73 (.265) 6.35 (.250) - a - 6.22 (.245) 5.97 (.235) - b - 3x 0.89 (.035) 0.64 (.025) 0.25 (.010) m a m b 2.28 (.090) 1.14 (.045) 0.76 (.030) 5.46 (.215) 5.21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) lead assignments 1 - gate 2 - drain 3 - source 4 - drain notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 2 controlling dimension : inch. 3 conforms to jedec outline to-252aa. 4 dimensions show n are before solder dip, solder dip max. +0.16 (.006). 9.65 (.380) 8.89 (.350) 2x 3x 2.28 (.090) 1.91 (.075) 1.52 (.060) 1.15 (.045) 4 1 2 3 6.45 (.245) 5.68 (.224) 0.58 (.023) 0.46 (.018)
www.irf.com 11 d-pak (to-252aa) tape & reel information

tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl notes : 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch data and specifications subject to change without notice. this product has been designed and qualified for the automotive [q101] market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 05/03 repetitive rating; pulse width limited by max. junction temperature. i sd 25a, di/dt 290a/s, v dd v (br)dss , t j 175c
pulse width 300s; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . limited by t jmax ' see fig 12a, 12b, 15, 16 for typical repetitive avalanche performance. this value determined from sample failure population. 100% tested to this value in production. limited by t jmax , starting t j = 25c, l = 0.55mh r g = 25 ? , i as = 15a, v gs =10v

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